1. Field of the Invention
The present invention relates to a device for setting a bias source at stand-by. It more specifically applies to a device using an inverter for controlling the deactivation of a bias source.
This application is related to an application U.S. Ser. No. 08,493,753 entitled DEVICE FOR SETTING A BIAS SOURCE AT PARTIAL STAND-BY AND CONTROL CIRCUIT FOR SUCH A SOURCE and to an application U.S. Ser. No. 08/493,851 entitled BIAS SOURCE CONTROL CIRCUIT, both filed on even date herewith, and incorporated herein by reference.
2. Discussion of the Related Art
Stand-by devices are used to reduce power consumption in a circuit during periods of non-use by deactivating the bias source, without it being necessary to switch off the circuit. They are of particular interest for systems with an independent power supply, consisting of, for example, ordinary or rechargeable batteries, such as remote sensors. The role of such sensors is, for example, to transmit data to a control panel in the case of a change in the state of the sensor. In such devices, it is essential to limit the consumption of the sensor during periods when its state is stable. In order to do this, the bias source of its emission units is set at stand-by when the sensor is in a stable state for a predetermined time interval. This enables the consumption of the device to be reduced during these periods. The bias source is reactivated as soon as the stand-by control signal changes state, giving an indication that the sensor no longer is in a stable state.
Conventionally, a device for setting a bias source at stand-by is constituted by an inverter including two MOS transistors connected between two bias source supply terminals.
FIG. 1 shows a conventional stand-by device. A bias source 1 is supplied by a supply voltage between two terminals A and B at potentials Vcc and Vss, respectively.
The bias source may, as an example, be constituted by a .DELTA.Vbe/R current source. Its known detailed constitution is not shown. It will only be noted that it consists in, for example, two branches of transistors connected as current mirrors between supply voltage terminals A and B. Each branch is constituted by a bipolar NPN type transistor and two MOS transistors, with a first p-channel transistor and a second n-channel transistor, a biasing resistor being interposed between the bipolar transistor and the first MOS transistor of the second branch. An example of the bias source is described in the copending application filed on even date herewith and entitled DEVICE FOR SETTING A BIAS SOURCE AT PARTIAL STAND-BY AND CONTROL CIRCUIT FOR SUCH A SOURCE.
A control input E is constituted by the drains of the MOS transistors of the first branch. This control input E receives a stand-by control signal "Stand-by" through a CMOS inverter constituted by two MOS transistors, MP1, MN2. These two transistors MP1, MN2 are connected between the two supply terminals A, B. The source of p-channel transistor MP1 is connected to the positive supply terminal A at potential Vcc, whereas its drain is connected to the drain of n-channel transistor MN2. The source of transistor MN2 is connected to the negative supply terminal B at potential Vss. The two transistors MP1, MN2 receive a "Stand-by" control signal on their gates, whereas their drains constitute the inverter output provided to the control input E of bias source 1.
The inverter provides an interface between the rest of the circuit and bias source 1. It additionally inverts the state of the "Stand-by" control signal, which usually is a logic signal whose low state V- represents a request for setting bias source 1 at stand-by. When a request for stand-by is issued, that is, when the "Stand-by" signal passes from its high state to its low state, the signal is inverted by the output of the stand-by device, constituted by CMOS inverter MP1, MN2. Since the inverter output is provided to the drains of the MOS transistors of the first branch of bias source 1, this output will turn off the upper MOS transistor of the branch by bringing its gate to potential Vcc, minus the voltage drop in the series resistance of transistor MP1. At this point, bias source 1 is at stand-by.
The output S of such a bias source 1 is constituted by the drains of the MOS transistors of the second branch. Its purpose is to activate the biasing of circuit units in which bias source 1 is implanted by means of current sources 2 controlled by bias source 1. These current sources are, for example, constituted by n-channel MOS transistors connected as current mirrors with the lower n-channel MOS transistors of bias source 1.
FIGS. 2A-2B show two timing diagrams of the current Iinv which flows through the CMOS inverter in connection with an example of a "Stand-by" signal, as well as the control potential E of bias source 1.
As can be seen, current Iinv attains a peak at the switching of the "Stand-by" signal to a stand-by state. The peak drops following the "Stand-by" signal. Voltage E is effectively inverted to switch off bias source 1, but the current flowing through the inverter causes a consumption which diminishes the autonomy of the devices in which it is implanted. Indeed, if the peak amplitude of current Iinv can be set by selecting the surface of the CMOS transistors constituting the inverter, its duration depends on the "Stand-by" signal. As a matter of fact, it depends on the switching time of the "Stand-by" signal between its two logic states.
Moreover, as can be seen on the figure, the "Stand-by" control signal usually does not switch between the two bias source supply potentials Vcc and Vss, but between two intermediate potentials V+ and V-. In this case, there is a continuous conduction in the inverter during the stand-by state of bias source 1, which causes a significant residual consumption during bias source stand-by periods. It should be noted that the value of potential V+ must be higher than Vcc-Vgsp, where Vgsp is the gate-source threshold voltage of transistor MP1, or else bias source 1 will be continuously at stand-by.